Need high-speed connectors for your design? Get expert selection guidance at connectorselection.com Explore →

Mitigating Stub Reflections in Mezzanine Traces

High-speed board-to-board links fail eye-diagram compliance due to via stub reflections. Eliminate the resonance through precise backdrilling.

Mitigating Stub Reflections in Mezzanine Traces

When designing hardware that pushes data rates past 10 Gbps—whether you are dealing with high-speed PCIe runs or multi-gigabit networking links—every vertical transition becomes a potential signal integrity nightmare. When a high-speed signal leaves a top-layer trace, travels through a plated through-hole (PTH) via, and enters an inner routing layer to reach a mezzanine connector, a portion of that via extends past the destination layer all the way to the bottom of the board. This unused portion of copper is an open-ended transmission line stub.

At lower frequencies, these stubs are electrically invisible. But at high frequencies, where the rise times of your digital pulses match or fall below the electrical length of the stub, the stub acts as a quarter-wave resonant tank circuit. When the signal hits the junction of the inner layer, a portion of the energy continues down the stub, hits the open end, and reflects back into the main signal path out of phase. This causes deep resonance nulls in your insertion loss profile, collapsing your eye diagram and triggering massive bit error rates.

To fix this without skyrocketing your fabrication budget on exotic blind or buried via stackups, you must specify backdrilling on your manufacturing print. Backdrilling uses a slightly oversized drill bit to mechanically remove the dead copper stub from the back side of the board after the primary plating process is complete. For maximum high-speed performance, configure your design rules to target a residual stub length of less than 0.1mm. Additionally, remember to pull back any unrelated copper planes around the backdrilled hole on the lower layers to prevent accidental shorts from drilling tolerances.